INTEGRATED DESIGN AND TEST ASSISTANCE FOR PIPELINE CONTROLLERS

We propose an integrated design and test assistance method for pipelin ed processors. Our approach generates behavioral-level test environmen ts for pipeline control mechanisms from a machine-readable specificati on. It includes automatic generation of test programs and behavioral d escriptions. Verification can be done by applying logic simulation to both the designers' descriptions and the behavioral descriptions, and then comparing the results. We have implemented an experimental system that enumerates all hazard patterns-instruction patterns that cause p ipeline hazards-from the specifications, and generates the test progra ms and the behavioral descriptions for the pipeline controllers. The t est programs cover all of the hazard patterns. The behavioral descript ions can manipulate any instruction stream. Experimental results for s everal RISC processors show that actual hazard patterns are too numero us to be easily enumerated by hand. Using workstations, our system can generate the test programs that cover all of the patterns, taking a f ew minutes. Results suggest that the system can be used to evaluate pi peline design.