PARALLEL VLSI ARCHITECTURE FOR MULTILAYER SELF-ORGANIZING CELLULAR NETWORK

Citation
Y. Miyanaga et K. Tochinai, PARALLEL VLSI ARCHITECTURE FOR MULTILAYER SELF-ORGANIZING CELLULAR NETWORK, IEICE transactions on electronics, E76C(7), 1993, pp. 1174-1181
Citations number
NO
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
09168524
Volume
E76C
Issue
7
Year of publication
1993
Pages
1174 - 1181
Database
ISI
SICI code
0916-8524(1993)E76C:7<1174:PVAFMS>2.0.ZU;2-4
Abstract
This paper proposes a multi-layer cellular network in which a self-org anizing method is implemented. The network is developed for the purpos e of data clustering and recognition. A multi-layer structure is prese nted to realize the sophisticated combination of several sub-spaces wh ich are spanned by given input characteristic data. A self-organizing method is useful for evaluating the set of clusters for input data wit hout a supervisor. Thus, using these techniques this network can provi de good clustering ability as an example for image/pattern data which have complicated and structured characteristics. In addition to the de velopment of this algorithm, this paper also presents a parallel VLSI architecture for realizing the mechanism with high efficiency. Since t he locality can be kept among all processing elements on every layer, the system is easily designed without large global data communication.