IMPLEMENTATION-INDEPENDENT MODEL OF AN INSTRUCTION SET ARCHITECTURE IN VHDL

This article describes a methodology using VHDL for creating executabl e models of computer architectures independent of implementation attri butes. The authors present such a model of a processor architecture kn own as the WM as the first step in developing an implementation. Simul ations using the model can provide performance measurements such as po tential parallelism. The model also can serve as an architectural spec ification for the computer.