DESIGN OF JOSEPHSON TERNARY DELTA-GATE (DELTA-GATE)

A new circuit design of Josephson ternary delta-gate composed of Josep hson junction devices is presented. Mathematical theory for synthesizi ng, analyzing, and realizing any given function in ternary system usin g Josephson ternary delta-gate is introduced. The Josephson ternary de lta-gate is realized using SQUID technique. Circuit simulation results using J-SPICE demonstrated the feasibility and the reliability operat ions of Josephson ternary delta-gate with very high performances for b oth speed and power consumption (max. propagation delay time=44 ps and max. power consumption = 2.6 muW). The Josephson ternary delta-gate f orms a complete set (completeness) with the ternary constants (- 1, 0, 1). The number of SQUIDs that are needed to perform the operation of delta-gate is 6. Different design with less than 6 SQUIDs is not possi ble because it can not perform the operation of delta-gate. The advant ages of Josephson ternary delta-gate compared with different Josephson logic circuits are as follows: The delta-gate has the property that a simple realization to any given ternary logic function as the buildin g blocks can be achieved. The delta-gate has simple construction with small number of SQUIDs. The delta-gate can realize a large number of t ernary functions with small number of input/output pins. The performan ces of delta-gate is very high, very low power consumption and ultra h igh speed switching operation.