DEVELOPMENT MODEL OF MAIN PROCESSING CONTROLLER FOR JAPANESE EXPERIMENT MODULE

Citation
K. Yamazaki et al., DEVELOPMENT MODEL OF MAIN PROCESSING CONTROLLER FOR JAPANESE EXPERIMENT MODULE, NEC research & development, 34(3), 1993, pp. 385-395
Citations number
NO
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
ISSN journal
0547051X
Volume
34
Issue
3
Year of publication
1993
Pages
385 - 395
Database
ISI
SICI code
0547-051X(1993)34:3<385:DMOMPC>2.0.ZU;2-U
Abstract
Japan is developing a Japanese Experiment Module (JEM) constituting a part of the international space station. The Main Processing Controlle r (MPC) is a unit which is the center of the computer/network system o f JEM. As authors have developed the development model of the MPC, the y have introduced its overview in this paper. The MPC is one of the fi rst computers for space applications with 32-bit processor architectur e in Japan. It has far higher performance and far more memory capacity than computers equipped on ordinary satellites. This paper describes the major features of the development model of the MPC and its design considering restrictions as a space-borne component and environmental conditions in space, especially high-energy cosmic particle irradiatio n. Authors have manufactured and evaluated the development models and have obtained the results they had expected.