A new kind of nonbinary CMOS divider and counter is presented. The div
ider directly gives a nonbinary dividing ratio without any decoder and
, therefore, no speed degradation. They can be directly cascaded to fo
rm a nonbinary ripple chain and can be programmable. The principle is
particularly useful for a nonbinary prescaler. A synchronous nonbinary
counter using this principle is also presented. Simulations show that
, in a 1.0 mum CMOS process, the nonbinary divider and its ripple chai
n can work up to 1.2 GHz.