MIN-NET WINNER-TAKE-ALL CMOS IMPLEMENTATION

Authors
HE Y SANCHEZSINENCIO E
Citation
Y. He et E. Sanchezsinencio, MIN-NET WINNER-TAKE-ALL CMOS IMPLEMENTATION, Electronics Letters, 29(14), 1993, pp. 1237-1239
Citations number
8
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
Electronics Letters → ACNP
ISSN journal
00135194
Volume
29
Issue
14
Year of publication
1993
Pages
1237 - 1239
Database
ISI
SICI code
0013-5194(1993)29:14<1237:MWCI>2.0.ZU;2-N
Abstract
A charge-based winner-take-all (WTA) circuit is proposed. This WTA cir cuit is a min-net capable of selecting the minimum value among its inp ut nodes and gives only one low voltage for the corresponding output n ode. The charge-based circuit uses a power supply of 3V, with low powe r dissipation due to the lack of static DC current involved. The WTA c ircuit is used in associative neural networks.