VLSI ARCHITECTURE FOR DIGITAL PROCESSING OF SPEECH SIGNALS

Due to the evolution of increasingly high performant DSP algorithms fo r bit rate reduction of speech signals in telecommunications, VLSI imp lementations of these applications are becoming more and more complex. The solutions currently being used for these applications are general purpose digital signal processors or DSP cores which are never fully adapted to the application in terms of VLSI architecture, i.e. silicon area and power consumption. We propose an alternative to these soluti ons, based on a parametrable Harvard architecture, and a C compiler wh ich gives an optimized microcode suited to this architecture and to th e application. Finally we present two examples of audio applications i mplemented using this solution.