DESIGN AND ARCHITECTURE OF MULTIPLIER-FREE FIR FILTERS USING PERIODICALLY TIME-VARYING TERNARY COEFFICIENTS

Citation
S. Ghanekar et al., DESIGN AND ARCHITECTURE OF MULTIPLIER-FREE FIR FILTERS USING PERIODICALLY TIME-VARYING TERNARY COEFFICIENTS, IEEE transactions on circuits and systems. 1, Fundamental theory andapplications, 40(5), 1993, pp. 364-370
Citations number
20
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
10577122
Volume
40
Issue
5
Year of publication
1993
Pages
364 - 370
Database
ISI
SICI code
1057-7122(1993)40:5<364:DAAOMF>2.0.ZU;2-O
Abstract
Multiplier-free realizations for FIR filters are proposed. The realiza tions use the periodically time-varying (PTV) system, flanked by simpl e units for upsampling and downsampling to achieve time-invariant mult iplier-free FIR filter operation. The PTV system uses only ternary ({0 , +/- 1}) coefficients, and the units before and after the PTV system use only power-of-two scalers. Therefore, the realizations can be impl emented with only add/subtract operations. Some architectures for the proposed structures are also presented.