ON THE DESIGN AND IMPLEMENTATION OF A LOSSLESS DATA-COMPRESSION AND DECOMPRESSION CHIP

A lossless data compression and decompression (LDCD) algorithm based o n the notion of textual substitution has been implemented in silicon u sing a linear systolic array architecture. This algorithm employs a mo del where the encoder and decoder each have a finite amount of memory which is referred to as the dictionary. Compression is achieved by fin ding matches between the dictionary and the input data stream whereby a substitution is made in the data stream by an index referencing the corresponding dictionary entry. The LDCD system is built using 30 appl ication-specific integrated circuits (ASIC's) each containing 126 iden tical processing elements (PE's) which perform both the encoding and d ecoding function at clock rates up to 20 MHz.