A 3-D SIDEWALL FLASH EPROM CELL AND MEMORY ARRAY

A promising new 3-D sidewall flash EPROM cell has been implemented in a novel memory array. The sidewall cell is a single-transistor stacked gate cell built on the sidewalls of a silicon pillar. The gates surro und the pillar and current flows vertically from top to bottom of the pillar. The cell size approaches the square of the minimum pitch and i s less than 40% of the conventional NOR-type structure. The cell and a rray architecture promise to be highly scalable.