LOW-POWER ON-CHIP SUPPLY VOLTAGE CONVERSION SCHEME FOR ULTRAHIGH-DENSITY DRAMS

In order to achieve 3.3-V 1-Gb DRAM and beyond, this paper proposes a new on-chip supply voltage conversion scheme, which converts 3.3-V ext ernal supply voltage V(ext) to lowered 1.5-V internal supply voltage V (int) without any power loss within the voltage converter. This scheme connects two identical DRAM circuits in series between V(ext) and V(s s). By operations of two DRAM circuits with the same clock timing, the voltage between two DRAM's, V(int), is automatically fixed to 1/2V(ex t). Therefore, each upper and lower DRAM circuit can operate at lowere d 1/2V(ext) without use of the conventional voltage converter. This sc heme was successfully verified by an experimental system using 4-Mb DR AM's. Utilizing the proposed scheme, power dissipation was reduced by as much as 50% and stable operation was achieved without access speed penalty.