UNIVERSAL MOSFET HOLE MOBILITY DEGRADATION MODELS FOR CIRCUIT SIMULATION

In order to simulate complex VLSI/ULSI circuits, circuit simulators mu st have accurate inversion layer mobility models which properly accoun t for mobility degradation with increasing electric field. In the conv entional mobility models in circuit simulators, such as SPICE, the com mon practice is to refit the parameters in the model for each differen t processing technology, which is cumbersome, and which restricts the versatility of the model. Universal models, fortunately, can be develo ped which provide user-friendliness, versatility, and accuracy to circ uit simulation codes. We present new universal, semi-empirical MOSFET hole inversion layer mobility degradation models for use in circuit si mulation programs such as SPICE. By accurately predicting the mobility degradation due to acoustic phonon scattering and surface roughness s cattering for p-channel MOSFET's at room temperature, these new models eliminate the need for fitting parameters for each technology, which is required in the current SPICE level 3 model. The new expressions re ported in this paper accurately predict the mobility over a very wide range of channel doping concentrations, gate oxide thicknesses, gate v oltage, and substrate bias, and agree very well with recently publishe d experimental mobility degradation data. When implemented in a circui t simulation code, these new models will accurately determine the chan nel mobility in surface p-channel MOSFET's using only the channel dopi ng concentration, gate oxide thickness, substate bias, and applied gat e drive voltage as input parameters. The new models are, therefore, mu ch more universal and a considerable improvement over the current SPIC E level 3 model, which must be refitted for each different processing technology.