Y. Takeuchi et al., RHINE - RECONFIGURABLE MULTIPROCESSOR SYSTEM FOR VIDEO CODEC, IEICE transactions on fundamentals of electronics, communications and computer science, E76A(6), 1993, pp. 947-956
This paper introduces the new application specific architecture RHINE
(Reconfigurable Hierarchical Image Neo-multiprocessor Engine) that is
a multiprocessor system for moving picture CODEC. The array processor
is known to be originally suited for data parallel processing such as
image signal processing which requires vast amount of computations and
has the identical instruction sequences on data. However, the moving
picture CODEC algorithm suffers from the large load imbalance in the p
rocessings on multi-processors with the separated sub-images. Some loa
d balancing techniques are indispensable in such applications for the
highest speed-up. RHINE gives one of the optimal solutions for such a
load balancing due to its feature of the self reconfigurable architect
ure. RHINE consists of Block Processing Units (BPU) hierarchically, in
each of which has a common bus architecture of multiprocessors with a
block memory. Processors in a BPU move to the other BPU according to
the load imbalance between BPUs by switching the bus connection betwee
n BPUs. The advantage of RHINE architecture is demonstrated by showing
performance simulations for real moving pictures.