ON THE MULTIPLE-FAULT TESTABILITY OF GENERALIZED COUNTERS

Authors
VERGIS A
Citation
A. Vergis, ON THE MULTIPLE-FAULT TESTABILITY OF GENERALIZED COUNTERS, IEEE transactions on computer-aided design of integrated circuits and systems, 12(6), 1993, pp. 905-909
Citations number
29
Categorie Soggetti
Computer Application, Chemistry & Engineering","Computer Applications & Cybernetics
Journal title
IEEE transactions on computer-aided design of integrated circuits and systems → ACNP
ISSN journal
02780070
Volume
12
Issue
6
Year of publication
1993
Pages
905 - 909
Database
ISI
SICI code
0278-0070(1993)12:6<905:OTMTOG>2.0.ZU;2-E
Abstract
It is shown that any generalized counter of full-adder cells is testab le for multiple faults with a test set of size proportional to the num ber of cells. Any number of cells can be faulty in any way, as long as the faults are permanent, the cells remain combinational, and no sign al values other than 0,1 are generated. For an N-cell circuit, the siz e of the test set is no larger than [29N/3] + 1.