CARRIER RESET OPERATION IN CHARGE MODULATION DEVICE

The reset operation of the charge modulation device (CMD) transistor w as examined by experiments and calculations. It was clarified that suc h conditions as high drain voltage, low reset gate voltage, short rese t time or scaling down the size of the CMD transistor have a tendency to cause reset incompleteness. However, it was revealed experimentally that an ordinary bias condition for the CMD imager leads to complete reset in 50 ns reset pulse duration even if the size of the CMD transi stor is scaled down to 5.0 mum x 5.2 mum. This reset time is very shor t compared to the allowed time for the CMD reset operation of about 10 mus and 1 mus in national television system committee (NTSC) and high definition television (HDTV) format, respectively. It was also reveal ed by calculations that lowering the drain voltage synchronized with r eset timing is very promising for rapid and complete reset operation. This method is applicable to all sizes of CMDs.