A highly regular switching network consisting of several switching sta
ges for output buffering is proposed Each switching element performs 3
x 3 switching and has a tail-spared buffer for each input port. Accor
ding to the performance evaluation of the proposed switching network b
ased on computer simulation, a packet loss ratio of 10(-8) was obtaine
d for a 1024 x 1024 switching network consisting of 15 stages with the
Bernoulli traffic source when the size of tail-spared buffer is 8 and
the input traffic load is 0.9.