A single-chip 2.4-Gb/s CMOS optical receiver IC with low substrate cross-talk preamplifier

Citation
A. Tanabe et al., A single-chip 2.4-Gb/s CMOS optical receiver IC with low substrate cross-talk preamplifier, IEEE J SOLI, 33(12), 1998, pp. 2148-2153
Citations number
8
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE JOURNAL OF SOLID-STATE CIRCUITS
ISSN journal
00189200 → ACNP
Volume
33
Issue
12
Year of publication
1998
Pages
2148 - 2153
Database
ISI
SICI code
0018-9200(199812)33:12<2148:AS2COR>2.0.ZU;2-S
Abstract
A single-chip 2.4-Gb/s CMOS optical-receiver IC has been realized for the f irst time using 0.15-mu m gate bulk CMOS. The chip integrates a preamplifie r, an automatic gain control, a phase-locked loop, and a 1:8 demultiplexer, This circuit has achieved a low power consumption of 104 mW (at 2.4 Gb/s, V-DD = 2 V), which is much smaller than that of conventional GaAs field-eff ect transistors and Si bipolar IC's. The design methodology to reduce digit al-to-analog substrate cross-talk noise is' discussed. Using this methodolo gy, a low-cross-talk sensitive preamplifier circuit with a 5.9 GHz bandwidt h and a 59-dB Omega gain has been developed and integrated into a single-ch ip receiver IC.