A single-chip 2.4-Gb/s CMOS optical-receiver IC has been realized for the f
irst time using 0.15-mu m gate bulk CMOS. The chip integrates a preamplifie
r, an automatic gain control, a phase-locked loop, and a 1:8 demultiplexer,
This circuit has achieved a low power consumption of 104 mW (at 2.4 Gb/s,
V-DD = 2 V), which is much smaller than that of conventional GaAs field-eff
ect transistors and Si bipolar IC's. The design methodology to reduce digit
al-to-analog substrate cross-talk noise is' discussed. Using this methodolo
gy, a low-cross-talk sensitive preamplifier circuit with a 5.9 GHz bandwidt
h and a 59-dB Omega gain has been developed and integrated into a single-ch
ip receiver IC.