PROPOSAL OF PSEUDO SOURCE AND DRAIN MOSFETS FOR EVALUATING 10-NM GATEMOSFETS

We propose a Pseudo source and drain metal oxide semiconductor field e ffect transistors (Ps-MOSFET) for investigating the electrical charact eristics and physical phenomena in 10-nm gate MOSFETs. The Ps-MOSFET c onsists of a lower gate and an upper gate which electrically induce ps eudo source and drain regions at the silicon surface. In this structur e, the pseudo source/drain regions act as doped source/drain regions i n a MOSFET. Since the pseudo source/drain regions are extremely shallo w; short-channel effects are expected to be suppressed in this structu re. To minimize the channel length and the leakage current, we optimiz ed the substrate doping concentration to be approximately 10(18) cm(-3 ) by using a two-dimensional numerical simulation. In this case, we ob tained a channel length of approximately 16 nm for 10-nm gate Ps-MOSFE Ts. Under this optimal doping condition, numerical calculations showed satisfactory transistor operations for the 10-nm gate Ps-MOSFETs: ON/ OFF current ratio similar to 10(6) and subthreshold slope similar to 1 00 mV/decade. We also showed by calculation that the direct source-dra in tunneling current was not negligible in the sub-10-nm regime.