Study of the hot spot of an in-plane gate transistor by scanning Joule expansion microscopy

The local heat dissipation of an in-plane gate (IPG) transistor was investi gated by means of a thermally modulated scanning Joule expansion microscope . The nanostructured sample was prepared by focused ion beam techniques. Th e temperature induced thermal expansion and the topographic information are measured simultaneously. The spatial resolution of the constructed microsc ope is below 50 nm. Heat spots of the semiconducting devices are visualized by heating them with modulated drain voltage. The heat spot position and t he temperature amplitude of the heat spot on the IPG transistor depend on t he gate voltage V-G. With an increasing negative magnitude of V-G the heat spot displaces in the direction from drain towards source. Simultaneously t he temperature amplitude of the maximum of the heat spot and the thermal ex pansion integrated over the heated area decrease linearly. (C) 1998 America n Institute of Physics. [S0021-8979(98)04924-X].