Low-power, low-phase-noise CMOS voltage-controlled-oscillator with integrated LC resonator

Integrated low-power, low-phase-noise voltage-controlled oscillators (VCOs) have been designed using a 0.5 mm CMOS technology with three metal layers. The inductors have been implemented using a third layer metal without othe r processing such as post etching. The on-chip varactors have been designed by a p(+) diffusion in an n-well. An interdigitating layout technique has been used to decrease the series resistance, thus increasing the quality fa ctor. The transistor sizes for VCO core are optimized to give minimum noise figure at a given bias current. The achieved phase noise is as low as -110 dBc/Hz at an offset frequency of 200 kHz from a carrier frequency of 972 M Hz, at a power consumption of only 6.6 mW with a 3.3 V power supply. The tu ning ranges are 834 MHz to 965 MHz for NMOS VCO and 862 MHz to 1004 MHz for PMOS VCO, respectively.