Silicon single electron transistors with a dual gate structure

Single electron transistors with a dual polysilicon gate structure have bee n fabricated and characterized. Using polysilicon sidewalls as-an upper gat e, we have demonstrated a method to form a quantum dot smaller than the lim it of e-beam lithography. Fabricated devices have been measured in a low te mperature environment of 15 mK and 4.2 K. Single electron transistor charac teristics, such as drain current oscillation and Coulomb gap, have been cle arly observed. At 15 mK, Coulomb gap in the drain current vs. drain bias wa s 5 similar to 15 mV at V-LG = 1.4 V and the period of current oscillation with gate voltage sweep was about 50 mV. At 4.2 K, similar Coulomb gap and drain current oscillation period were observed. The capacitance between the gate and the electrical quantum dot was estimated to be at 3.4x10(-18) F. Using the extracted device parameters, it was predicted that these devices would work even at 100 K, and indeed the device operation was confirmed at 100 K.