A new fabrication process for nanoscale tungsten tip arrays was developed f
or scanning probe microscopy-based devices. It is suitable to make a huge a
rray on a device chip and is potentially compatible with CMOS technology. I
n this study, tungsten was selected as a tip material because of its hardne
ss and conductivity. The newly developed fabrication process mainly consist
s of several important techniques: a combination of optical lithography and
electron beam (EB) lithography to reduce the total exposure time with high
resolution and chromium/tungsten/chromium (Cr/W/Cr) sandwich deposition an
d etching in which the first chromium layer is used as a mask and a second
one is used as an etch stop, A periodic array of dots in an EB resist with
a spot diameter of less than 50 nm was obtained by a combination of optical
lithography and EB lithography with a positive resist (polymethylmethacryl
ate) in which all processing conditions were optimized carefully, A thin an
d uniform chromium film, deposited by ion-beam sputtering, allowed the use
of thin polymethylmethacrylate (PMMA) film which led to the high resolution
. The conditions of de magnetron sputtering were also optimized in order to
deposit a densely packed and low-resistivity film, The resulting tungsten
tip arrays had a cylindrical shape with diameters of less than 60 nm and he
ights of 300 nm. [294].