Architecture of a terabit free-space intelligent optical backplane

Optical technologies can support thousands of high bandwidth optical channe ls to/from a single CMOS integrated circuit, and can thus allow for the con struction of novel bandwidth-intensive computing architectures which are no longer constrained by conventional electronic wiring limitations. In this paper, the architecture of a dynamically reconfigurable Intelligent Optical Backplane is described. The backplane consists of a large number of parall el optical channels (typically 1000-10,000 bits) spaced a few hundred micro meters apart. The optical channels are arranged into upstream and downstrea m rings, where the channel access protocols are implemented by "smart pixel arrays." The architecture exploits the bandwith advantage of the optical d omain and can be dynamically reconfigured to embed conventional interconnec tion networks, including multiple busses, rings, and meshes. Unlike all-opt ical and passive optical systems, the proposed backplane is intelligent and can support communication primitives used in shared memory multiprocessing , including broadcasting, multicasting, acknowledgment, flow and error-cont rol, buffering, shared memory caching, and synchronization. The backplane i s also manufacturable using existing optoelectronic technologies. A second generation backplane supporting a distributed shared memory multi-processor is under development. (C) 1998 Academic Press.