An efficient and orderly implementation of bypass queue under bursty traffic

Authors
Wu, JSC Lin, YD
Citation
Jsc. Wu et Yd. Lin, An efficient and orderly implementation of bypass queue under bursty traffic, PARALLEL C, 24(14), 1998, pp. 2143-2148
Citations number
4
Categorie Soggetti
Computer Science & Engineering
Journal title
PARALLEL COMPUTING
ISSN journal
01678191 → ACNP
Volume
24
Issue
14
Year of publication
1998
Pages
2143 - 2148
Database
ISI
SICI code
0167-8191(199812)24:14<2143:AEAOIO>2.0.ZU;2-D
Abstract
Sharma and Pinnu proposed an implementation of bypass queue by many FIFOs; unfortunately, the detailed procedure paid little attention to maintaining cell sequence, which is an important feature in ATM network. In this paper, we propose an improved architecture which guarantees cell sequence integri ty and describe its related operating procedures. (C) 1998 Elsevier Science B.V. All rights reserved.