When thinking of semiconductor memories, it comes naturally to associate st
ored bits and memory cells with a one-to-one relationship that, however, is
not really a must nor necessarily the most convenient solution for data st
orage, since using analog signals and digital-to-analog (D/A) as well as an
alog-to digital (A/D) conversions a large number of bits could be memorized
in a single cell, although, of course, the use of analog signals presents
all the drawback of signal-to-noise ratio that are so well known in electro
nics. In fact, the real question in this sense concerns the number of bits
used for the A/D and D/A conversions, since the conventional (fully) digita
l case can be seen as the simplest realization of a general approach tendin
g to infinitely precise analog storage (i.e., an infinite number of stored
bits per cell) at the other extreme. Naturally in the real world the confli
cting aspects of density (measured in bits per cell) and noise immunity (in
a general sense) should be traded off one against the other looking for op
timum use of silicon area, of course depending on technology, architectures
, circuits and reliability. From this point of view it is obvious that the
fully digital approach based on the one-bit one-cell concept does not repre
sent necessarily the best solution.
Recently, this general question has assumed real and practical significance
for nonvolatile memories, since devices storing two bits per cell are now
being introduced on the market. At the same time, in a number of research l
abs a significant effort is currently being dedicated to the study of the l
imits and practical convenience of storage density considering the current
state of the art in technology and circuit design. This problem, however pr
esents a number of interacting aspects concerning cell concept, programming
and reading schemes, and architectures and reliability that are of interes
t well beyond the field of nonvolatile memories, because they are ultimatel
y dealing with the basic question of analog versus digital signals.
In this context, the present paper considers the question of multilevel non
volatile memories in all its interacting aspects, analyzing both the curren
t state of the art and the future possibilities.