Expert system hardware for fault detection

This paper focuses upon the development of three new electronic architectur es of inference engines as a part of a hardware expert system applied to ve ry high-speed faults detection in industrial processes. The architecture of this expert system consists of an inference engine (a dedicated processor that is necessary due to the high-speed requirements and the repetitiveness of the operation), which uses a pattern-directed inference system; a fact base, which stores the status of the signals at each moment, and a static k nowledge base, which contains the inference rules compiled from expert know ledge. A circuit for analyzing time is also presented. This allows time to be taken as another variable of the process and carries out a redundancy an alysis simultaneously with the fault detection module.