Design considerations of high-kappa gate dielectrics for sub-0.1-mu m MOSFET's

The potential impact of high-kappa gate dielectrics on device short-channel performance is studied over a wide range of dielectric permittivities. It is shown that the short-channel performance degradation caused by the fring ing fields from the gate to the source/drain regions, is mainly determined by the gate thickness-to-length aspect ratio. In addition, the gate stack c onfiguration also plays an important role in the determination of the devic e short-channel performance degradation.