This paper describes a new CAD tool, FTROM - Fault-Tolerant ROM compiler, w
hich synthesizes layout geometries of fault-tolerant ROM modules with flexi
ble, user-specified geometry and CMOS design-rule parameters. This physical
design tool produces high-quality built-in self-testable (BIST) and fault-
tolerant ROM layouts and uses a novel, minimum-delay overhead approach for
fault-tolerance. A tool like FTROMeliminates the high cost of external test
ing of embedded ROM macros with I/O pins that are difficult to control and
observe. (C) 1998 Published by Elsevier Science B.V. All rights reserved.