Design of mixed-signal systems for testability

Authors
Citation
Vd. Agrawal, Design of mixed-signal systems for testability, INTEGRATION, 26(1-2), 1998, pp. 141-150
Citations number
39
Categorie Soggetti
Computer Science & Engineering
Journal title
INTEGRATION-THE VLSI JOURNAL
ISSN journal
01679260 → ACNP
Volume
26
Issue
1-2
Year of publication
1998
Pages
141 - 150
Database
ISI
SICI code
0167-9260(199812)26:1-2<141:DOMSFT>2.0.ZU;2-8
Abstract
Significant differences in fault models and test methodologies used for ana log and digital circuits make a common test for a mixed-signal device diffi cult. A divide and conquer strategy partitions the circuit into three types of blocks: analog, digital logic and memory. The test and design for testa bility methods for each type of block exist but assume a direct access to t he block under test. Thus, an additional design for testability structure u sing boundary scan and mixed-signal test bus is incorporated for effective test application. With this design, separate specialized tests are applied to analog and digital parts, as well as to interconnects. The area overhead of the test access structure is generally small as it is shown to be inver sely proportional to the square root of the block area. While the partition ed architecture provides a reasonable test solution, weakness remains in th e test of block interfaces. Research on unified analog-digital tests is rec ommended. Delay tests and current measurement tests may provide possible so lutions. (C) 1998 Published by Elsevier Science B.V. All rights reserved.