High-level test synthesis for behavioral and structural designs

Authors
Papachristou, CA Baklashov, M Lai, K
Citation
Ca. Papachristou et al., High-level test synthesis for behavioral and structural designs, J ELEC TEST, 13(2), 1998, pp. 167-188
Citations number
24
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS
ISSN journal
09238174 → ACNP
Volume
13
Issue
2
Year of publication
1998
Pages
167 - 188
Database
ISI
SICI code
0923-8174(199810)13:2<167:HTSFBA>2.0.ZU;2-X
Abstract
High-Level Test Synthesis (HLTS), a term introduced in recent years, promis es automatic enhancement of testability of a circuit. In this paper we will show how HLTS can achieve higher testability for BIST-oriented test method ologies. Our results show considering testability during high-level synthes is, better testability can be obtained when compared to DFT at low level. T ransformation for testability, which allows behavioral modification for tes tability, is a very powerful HLTS technique.