JiffyTune: Circuit optimization using time-domain sensitivities

Automating the transistor and wire-sizing process is an important step towa rd being able to rapidly design highperformance, custom circuits. This pape r presents a circuit optimization tool that automates the tuning task by me ans of state-of-the-art nonlinear optimization. It makes use of a fast circ uit simulator and a general-purpose nonlinear optimization package. It incl udes minimax and power optimization, simultaneous transistor and wire tunin g, general choices of objective functions and constraints, and recovery fro m nonworking circuits. In addition, the tool makes use of designer-friendly interfaces that automate the specification of the optimization task, the r unning of the optimizer, and the back-annotation of the results of optimiza tion onto the circuit schematic. Particularly for large circuits, gradient computation is usually the bottle neck in the optimization procedure. In addition to traditional adjoint and direct methods, we use a technique called the adjoint Lagrangian method, wh ich computes all the gradients necessary for one iteration of optimization in a single adjoint analysis. This paper describes the algorithms and the environment in which they are u sed and presents extensive circuit optimization results. A circuit with 690 0 transistors, 4128 tunable transistors, and 60 independent parameters was optimized in about 108 min of CPU time on an IBM Risc/System 6000, model 59 0.