LOW-TEMPERATURE AND LOW-COST PLANARISED ALUMINUM INTERCONNECT FOR SUBHALF MICROMETER VLSI CIRCUITS

Planarised Al interconnect structures for sub-half micrometre integrat ed circuits have been fabricated by a novel low temperature and low pr essure sputtering deposition technique. Simultaneous high aspect ratio interconnect hole fill and metal layer planarisation were achieved wi th moderate heat applied to processed wafers during the Al deposition. Low via resistance (similar to 1 Omega for 0.35 mu m vias) and high v ia chain yield (similar to 100%) have been obtained on the wafers proc essed at a wafer temperature of 380 degrees C.