Dynamic threshold pass-transistor logic for improved delay at lower power supply voltages

We have investigated circuit options to surpass the 1-V power-supply limita tion predicted by traditional scaling guidelines. By modulating the body bi as, we can dynamically adjust the threshold voltage to have different on- a nd off-state values. Several dynamic threshold voltage MOSFET (DTMOS) logic styles were analyzed for ultralow-power use-from 1.5 down to 0.5 V, Since ordinary pass-transistor logic degrades as the voltages are reduced, we inv estigated the effects that a dynamic threshold has on various sta les of pa ss-transistor logic. Three different pass-transistor restoration schemes we re simulated with the various DTMOS techniques. Results indicate that contr olling the body bias can provide a substantial speed increase and that such techniques are useful over a large range of supply voltages, Process compl exity and other tradeoffs associated with DTMOS logic variations are also d iscussed.