We describe the design and simulation of the use of neuron MOSFETs in
a simple application - that of a parallel-carry adder circuit. The neu
ron MOSFETs are multigated MOSFETs where the multiple coupling to a MO
SFET's gate is made capacitatively. By using such devices a multilevel
logic is achieved that allows functions in a circuit to be achieved w
ith fewer transistors than in a conventional CMOS design.