Fully ion-implanted low-noise GaAs MESFET's with a 0.11-mu m Au/WSiN T-shap
ed gate have been successfully developed for applications in monolithic mic
rowave and millimeterwave integrated circuits (MMIC's). In order to reduce
the gate resistance, a wide Au gate head made of a first-level interconnect
is employed. As the wide gate head results in parasitic capacitance, the r
elation between the gate head length (L-h) and the device performance is ex
amined, The gate resistance is also precisely calculated using the cold FET
technique and Mahon and Anhold's method. A current gain cutoff frequency (
f(T)) and a maximum stable gain (MSG) decrease monotonously as L-h increase
s on account of parasitic capacitance, However, the device with L-h of 1.0
mu m, which has lower gate resistance than 1.0 Omega, exhibits a noise figu
re of 0.78 dB with an associated gain of 8.7 dB at an operating frequency o
f 26 GHz, The measured noise figure is comparable to that of GaAs-based HEM
T's.