A better understanding of substrate enhanced gate current in VLSI MOSFET'sand flash cells - Part I: Phenomenological aspects

This paper analyzes in depth the phenomenon of gate current enhancement upo n application of a substrate voltage (\V-B\) recently observed in deep subm icron MOSFET's. The correlation between the gate (I-G) and the substrate (I-B) current is s tudied as a function of \V-B\, and it is shown: 1) to provide an experiment al signature of the onset of a new injection regime; and 2) to suggest a si mple technique for separating the substrate enhanced gate current component from the conventional channel hot electron one. An empirical model of the new injection regime is assessed and the dependence of the model parameter on the lateral and vertical field is demonstrated, The sensitivity of the e nhanced gate current to device design issues is also characterized. Different charge injection mechanisms compatible with the highlighted corre lation between I-G and I-B are carefully analyzed in Part II, and all but o ne are discarded based on experimental and simulation results.