Highly integrated InP HBT optical receivers

This paper presents two highly integrated receiver circuits fabricated in I nP heterojunction bipolar transistor (HBT) technology operating at up to 2. 5 and 7.5 Gb/s, respectively, The first IC is a generic digital receiver ci rcuit with CMOS-compatible outputs. It integrates monolithically an automat ic-gain-control amplifier, a digital clock and data recovery circuit, and a 1 : 8 demultiplexer, and consumes an extremely low 340 mW of power at 3.3 V, including output buffers. It can realize a full optical receiver when co nnected to a photo detector/preamplifier front end. The second circuit is a complete multirate optical receiver application-specific integrated circui t (ASIC) that integrates a photo diode, a transimpedance amplifier, a limit ing amplifier, a digital clock and data recovery circuit, a 1 : 10 demultip lexer, and the asynchronous-transfer-mode-compatible word synchronization l ogic. It is the most functionally complex InP HBT optoelectronic integrated circuit reported to date, A custom package has also been developed for thi s ASIC.