We introduce a new design style called extended burst-mode. The extended bu
rst-mode design style covers a,vide spectrum of sequential circuits ranging
from delay-insensitive to synchronous. We can synthesize multiple-input ch
ange asynchronous finite state machines and many circuits that fall in the
gray area (hard to classify as synchronous or asynchronous) which are diffi
cult or impossible to synthesize automatically using existing methods. Our
implementation of extended burst-mode machines uses standard CMOS logic, ge
nerates low-latency outputs, and guarantees freedom from hazards at the gat
e level, In Part II, we present a complete set of automated sequential synt
hesis algorithms: hazard-free state assignment, hazard-free state minimizat
ion, and critical-race-free state encoding. Experimental data from a large
set of examples are presented and compared to competing methods whenever po
ssible.