A macromodel for a fixed, positive, three-terminal, IC voltage regulator is
presented. The macromodel models the important non-ideal effects of typica
l voltage regulators. The model can be used in both board-level design and
as a block in a larger analogue VLSI design. Design formulas are provided s
o the model may be based on data sheet specifications or measured data. A d
esign example is presented and compared to measured specifications.