CMOS transconductance multipliers: A tutorial

Real-time analog multiplication of two signals is one of the mast important operations in analog signal processing. The multiplier is used not only as a computational building block but also as a programming element in system s such as filters, neural networks, and as mixers and modulators in a commu nication system. Although high performance bipolar junction transistor mult ipliers have been available for some time, the CMOS multiplier implementati on is still a challenging subject especially for low-voltage and low-power circuit design. Despite the large number of papers proposing new MOS multip lier structures, they can be roughly grouped into a few categories. This tu torial provides a complete survey of CMOS multipliers, presents a unified g eneration of multiplier architectures, and proposes the most recommended MO S multiplier structure. This tutorial could serve as a starting reference p oint (and metric) for comparison of new CMOS multiplier circuit configurati ons. An illustrative CMOS chip prototype verifying theoretical results is p resented.