This paper is the first in a series of two papers describing the algorithms
used in the development of MISTIC (Michigan synthesis tools for integrated
circuits). MISTIC is a planar device process compiler that generates proce
ss hows for thin film devices from schematics of their structure, This soft
ware uses a laboratory specific database of process recipes to produce proc
ess hows for a specific set of laboratory resources (furnaces, etchers, lit
hography equipment, etc.) and generates process statistics that help to cho
ose the most suitable process how in a comparative manner. The process comp
iler is augmented by several auxiliary modules: a device builder, process v
iewer, and database editor thus forming a self-contained process design env
ironment. This paper concentrates on the algorithms used to construct proce
ss hows from schematic device representations. The compiler algorithms firs
t extract a directed graph representation of the device organization stored
in the form of a restricted square boolean matrix. This matrix is used to
generate linear ordered lists of device layers which serve as footprints fo
r the construction of profess flows. Process hows are then constructed from
these lists through a series of conversions, expansions, and insertions of
process steps. The theoretical foundations for the algorithms can be found
in [1].