Automatic generation of thin film process flows - Part II: Recipe generation, flow evaluation, and system framework

This paper is the second in a series of two papers describing the methodolo gy and algorithms used in the development of MISTIC (Michigan synthesis too ls for integrated circuits). Part I discussed the basic topological algorit hms used to produce generic sequences of processing steps required for the fabrication of a given device structure. Part II discusses the expansion of these sequences into complete process hows, This procedure involves the se lection of specific recipes from a set of available processing resources an d the calculation of recipe parameters, These processing resources are stor ed in a database central to the MISTIC system framework. Since many process hows are generated for a given device, the paper also discusses the calcul ation of suitable figures of merit. The capabilities of the MISTIC system a re demonstrated with a BiCMOS example. The MISTIC system framework which co ntains the basic compiler and several supporting modules: a device builder, process viewer, and database editor is also presented.