DESIGN AND ANALYSIS OF CURRENT-MODE CMOS ANALOG DEFUZZIFICATION CIRCUIT FOR FUZZY CONTROLLERS

A current-mode CMOS analog defuzzification circuit which has already p roposed is insensitive to absolute variation of the fabrication proces s and it is easy to expand into a multiple-input one. However, it has two disadvantages. One is that it needs two input currents which are e qual in magnitude and opposite in direction (sign). A current steering circuit which consists of current miners is used to change the direct ion of the input current signals. However, because current mirrors are strongly influenced by the channel length modulation effect, it is ve ry difficult to generate the desired current signal. The other disadva ntage is that it needs input bias currents for all input signals, whic h causes high power consumption. In this paper, a current-mode CMOS an alog four-quadrant multiplier for defuzzification circuits is proposed . The proposed multiplier is insensitive to absolute variation of the fabrication process. Furthermore, it removes the above disadvantages. A defuzzification circuit using the proposed multiplier is also design ed. The proposed defuzzification circuit has decreased power dissipati on owing to the use of a common bias block circuit. These circuits are analyzed in detail with the PSPICE program. Lastly, the proposed defu zzification circuit is evaluated and the validity is discussed.