Citation
Ct. Huang et al., A programmable BIST core for embedded DRAM, IEEE DES T, 16(1), 1999, pp. 59-70
Citations number
10
Categorie Soggetti
Computer Science & Engineering
Journal title
IEEE DESIGN & TEST OF COMPUTERS
ISSN journal
07407475
→ ACNP
Volume
16
Issue
1
Year of publication
1999
Pages
59 - 70
Database
ISI
SICI code
0740-7475(199901/03)16:1<59:APBCFE>2.0.ZU;2-G
Abstract
The programmable BIST design presented here supports various test modes usi
ng a simple controller. With the March C- algorithm, the BIST circuit's ove
rhead is under 1.3% for a 1-Mbit DRAM and under 0.3% for a 16-Mbit DRAM.