The combination of resonant tunneling diodes (RTD's) and complementary meta
l-oxide-semiconductor (CMOS) silicon circuitry can offer substantial improv
ement in speed, power dissipation, and circuit complexity over CMOS-only ci
rcuits. We demonstrate the first integrated resonant tunneling CMOS circuit
, a clocked 1-bit comparator with a device count of six, compared with 21 i
n a comparable all-CMOS design. A hybrid integration process is developed f
or InP-based RTD's which are transferred and bonded to CMOS chips. The prot
otype comparator shows sensitivity in excess of 10(6) VIA, and achieves err
or-free performance in functionality testing. An optimized integration proc
ess, under development, can yield high-speed, low power circuits by lowerin
g the high parasitic capacitance associated with the prototype circuit.