A nyquist-rate pixel-level ADC for CMOS image sensors

Citation
Dxd. Yang et al., A nyquist-rate pixel-level ADC for CMOS image sensors, IEEE J SOLI, 34(3), 1999, pp. 348-356
Citations number
21
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE JOURNAL OF SOLID-STATE CIRCUITS
ISSN journal
00189200 → ACNP
Volume
34
Issue
3
Year of publication
1999
Pages
348 - 356
Database
ISI
SICI code
0018-9200(199903)34:3<348:ANPAFC>2.0.ZU;2-A
Abstract
A multichannel bit-serial (MCBS) analog ta-digital converter (ADC) is prese nted, The ADC is ideally suited to pixel-level implementation in a CMOS ima ge sensor. The ADC uses successive comparisons to output one bit at a time simultaneously from all pixels, It Is Implemented using a 1-bit comparator/ latch pair per pixel or per group of neighboring pixels, and a digital-to-a nalog-converter/controller shared by all pixels. The comparator/latch pair operates at very slow speeds and can be implemented using simple robust cir cuits, The ADC's can be fully tested by applying electrical signals without any optics or light sources, A CMOS 320 x 256 sensor using the MCBS ADC is described. The chip measures 4.14 x 5.16 mm(2), It achieves 10 x 10 mu m(2 ) pixel size at 28% fill factor in 0.35-mu m CMOS technology, Each 2 x 2 pi xel block shares an ADC, The pixel block circuit comprises 18 transistors. It operates in subthreshold to maximize gain and minimize power consumption , The power consumed by the sensor array is 20 mW at 30 frames/s. The measu red integral nonlinearity is 2.3 LSB, and differential nonlinearity is 1.2 LSB at eight bits of resolution The standard deviation of the gain and offs et fixed pattern noise due to the ADC are 0.24 and 0.2%, respectively.