MDSP-II: A 16-bit DSP with mobile communication accelerator

This paper describes a 16-bit programmable fixed-point digital signal proce ssor, called MDSP-II, for mobile communication applications. The instructio n set of MDSP-II was determined after a careful analysis of the global syst em for mobile communications (GSM) baseband functions. An application-speci fic hardware block called the mobile communication accelerator (MCA) was in corporated on-chip to accelerate the execution of the hey operations freque ntly appearing in Viterbi equalization. With the assistance of MCA, the GSM baseband functions, which need 53 milli on instructions per second (MIPS) on the general-purpose digital signal pro cessors, can be performed only with 19 MIPS. The MDSP-II was implemented wi th a 0.6-mu m triple-layer metal CMOS process on a 9.7 x 9.8 mm(2) silicon area and was operated up to 50 MHz clock frequency.