Usually, integrated detectors in CMOS exhibit long recovery times, limiting
the detector bandwidth to only a few MHz. This is due to the long absorpti
on length and the slow diffusion speed of photo-generated carriers. Differe
nt approaches have been proposed to serve these problems hereby taxing the
compatibility with standard CMOS fabrication processing. We present a novel
detector for high-speed light detection in standard CMOS. To solve the pro
blem of slow CMOS-detector recovery, the incident light is spatially modula
ted and the spatially modulated component of the photo-generated carrier di
stribution is measured. Though only a single light input signal is required
, from the detector on, analog signal processing can be achieved fully diff
erentially. Subsequently, expected good PSRR (Power supply rejection ratio)
allows integration with digital circuits. Avoiding hybridization eliminate
s the conventional problems caused by bonding-pad capacitance, bonding-wire
inductance. This reduces the associated signal degradation. In addition, t
he very low detector capacitance, due to the low effectively used detector
area and the low area capacitance of the n-well junction, yields high volta
ge readout of the detector. This facilitates further amplification and conv
ersion to digital signal levers. The detector will be applicable in arrays
due to expected low cross talk. The expected fields of operation involve: s
erial and parallel optical communication receivers (e.g. for WDM), DVD-read
ing heads with integrated amplifier, etc.
First measurements show 200 Mbit/s operation with a detector-responsivity o
f 0.05 A/W at lambda = 860 nm and 0.132 A/W at lambda = 635 nm. The detecto
r has inherently a low capacitance, in this case only 50 fF (for an effecti
ve detector area of 70 x 70 mu m(2)). (C) 1999 Elsevier Science Ltd. All ri
ghts reserved.