PARTIALLY DEPLETED SOI NMOSFETS WITH SELF-ALIGNED POLYSILICON GATE FORMED ON THE RECESSED CHANNEL REGION

Citation
Jh. Lee et al., PARTIALLY DEPLETED SOI NMOSFETS WITH SELF-ALIGNED POLYSILICON GATE FORMED ON THE RECESSED CHANNEL REGION, IEEE electron device letters, 18(5), 1997, pp. 184-186
Citations number
10
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
07413106
Volume
18
Issue
5
Year of publication
1997
Pages
184 - 186
Database
ISI
SICI code
0741-3106(1997)18:5<184:PDSNWS>2.0.ZU;2-B
Abstract
A new SOI NMOSFET with a ''LOCOS-like'' shape self-aligned polgsilicon gate formed on the recessed channel region has been fabricated by a m ix-and-match technology. For the first time, we developed a new scheme for implementing self-alignment in both source/drain and gate structu re in recessed channel device fabrication, Symmetric source/drain dopi ng profile was obtained and highly symmetric electrical characteristic s were observed, Drain current measured from 0.3 mu m SOI devices with V-T of 0.773 V and T-ox = 7.6 nm is 360 mu A/mu m at V-GS = 3.5 V and V-DS = 2.5 V. Improved breakdown characteristics were obtained and th e BVDSS (the drain voltage for 1 nA/mu m of I-D at V-GS = 0 V) of the device with L-eff = 0.3 mu m under the floating body condition was as high as 3.7 V.